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[gpio_expander] Add intelligent pin type selection to CachedGpioExpander template (#10577)
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@@ -4,6 +4,7 @@
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#include <cstdint>
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#include <cstring>
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#include <limits>
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#include <type_traits>
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#include "esphome/core/hal.h"
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namespace esphome::gpio_expander {
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@@ -11,18 +12,27 @@ namespace esphome::gpio_expander {
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/// @brief A class to cache the read state of a GPIO expander.
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/// This class caches reads between GPIO Pins which are on the same bank.
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/// This means that for reading whole Port (ex. 8 pins) component needs only one
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/// I2C/SPI read per main loop call. It assumes, that one bit in byte identifies one GPIO pin
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/// I2C/SPI read per main loop call. It assumes that one bit in byte identifies one GPIO pin.
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///
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/// Template parameters:
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/// T - Type which represents internal register. Could be uint8_t or uint16_t. Adjust to
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/// match size of your internal GPIO bank register.
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/// N - Number of pins
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template<typename T, T N> class CachedGpioExpander {
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/// T - Type which represents internal bank register. Could be uint8_t or uint16_t.
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/// Choose based on how your I/O expander reads pins:
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/// * uint8_t: For chips that read banks separately (8 pins at a time)
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/// Examples: MCP23017 (2x8-bit banks), TCA9555 (2x8-bit banks)
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/// * uint16_t: For chips that read all pins at once (up to 16 pins)
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/// Examples: PCF8574/8575 (8/16 pins), PCA9554/9555 (8/16 pins)
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/// N - Total number of pins (maximum 65535)
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/// P - Type for pin number parameters (automatically selected based on N:
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/// uint8_t for N<=256, uint16_t for N>256). Can be explicitly specified
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/// if needed (e.g., for components like SN74HC165 with >256 pins)
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template<typename T, uint16_t N, typename P = typename std::conditional<(N > 256), uint16_t, uint8_t>::type>
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class CachedGpioExpander {
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public:
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/// @brief Read the state of the given pin. This will invalidate the cache for the given pin number.
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/// @param pin Pin number to read
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/// @return Pin state
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bool digital_read(T pin) {
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const uint8_t bank = pin / BANK_SIZE;
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bool digital_read(P pin) {
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const P bank = pin / BANK_SIZE;
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const T pin_mask = (1 << (pin % BANK_SIZE));
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// Check if specific pin cache is valid
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if (this->read_cache_valid_[bank] & pin_mask) {
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@@ -38,21 +48,31 @@ template<typename T, T N> class CachedGpioExpander {
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return this->digital_read_cache(pin);
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}
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void digital_write(T pin, bool value) { this->digital_write_hw(pin, value); }
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void digital_write(P pin, bool value) { this->digital_write_hw(pin, value); }
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protected:
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/// @brief Call component low level function to read GPIO state from device
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virtual bool digital_read_hw(T pin) = 0;
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/// @brief Call component read function from internal cache.
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virtual bool digital_read_cache(T pin) = 0;
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/// @brief Call component low level function to write GPIO state to device
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virtual void digital_write_hw(T pin, bool value) = 0;
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/// @brief Read GPIO bank from hardware into internal state
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/// @param pin Pin number (used to determine which bank to read)
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/// @return true if read succeeded, false on communication error
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/// @note This does NOT return the pin state. It returns whether the read operation succeeded.
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/// The actual pin state should be returned by digital_read_cache().
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virtual bool digital_read_hw(P pin) = 0;
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/// @brief Get cached pin value from internal state
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/// @param pin Pin number to read
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/// @return Pin state (true = HIGH, false = LOW)
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virtual bool digital_read_cache(P pin) = 0;
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/// @brief Write GPIO state to hardware
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/// @param pin Pin number to write
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/// @param value Pin state to write (true = HIGH, false = LOW)
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virtual void digital_write_hw(P pin, bool value) = 0;
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/// @brief Invalidate cache. This function should be called in component loop().
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void reset_pin_cache_() { memset(this->read_cache_valid_, 0x00, CACHE_SIZE_BYTES); }
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static constexpr uint8_t BITS_PER_BYTE = 8;
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static constexpr uint8_t BANK_SIZE = sizeof(T) * BITS_PER_BYTE;
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static constexpr uint16_t BITS_PER_BYTE = 8;
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static constexpr uint16_t BANK_SIZE = sizeof(T) * BITS_PER_BYTE;
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static constexpr size_t BANKS = N / BANK_SIZE;
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static constexpr size_t CACHE_SIZE_BYTES = BANKS * sizeof(T);
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