sascha/esphome
1
0
Fork 0
mirror of https://github.com/esphome/esphome.git synced 2025-09-22 13:12:22 +01:00
Code Issues Releases Wiki Activity

Change UART source clock to UART_SCLK_DEFAULT when IDF >=v5 (#5533)

Browse Source
This commit is contained in:
leoshusar
2023-10-16 00:29:13 +02:00
committed by GitHub
parent 6143099f60
commit 357ba1ab0f
1 changed files with 4 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
esphome/components/uart/uart_component_esp_idf.cpp
View File

@@ -48,7 +48,11 @@ uart_config_t IDFUARTComponent::get_config_() {
uart_config.parity = parity;
uart_config.stop_bits = this->stop_bits_ == 1 ? UART_STOP_BITS_1 : UART_STOP_BITS_2;
uart_config.flow_ctrl = UART_HW_FLOWCTRL_DISABLE;
#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 0, 0)
uart_config.source_clk = UART_SCLK_DEFAULT;
#else
uart_config.source_clk = UART_SCLK_APB;
#endif
uart_config.rx_flow_ctrl_thresh = 122;
return uart_config;