mirror of
https://github.com/esphome/esphome.git
synced 2025-03-20 17:48:17 +00:00
send functionality
This commit is contained in:
mvturnho
parent
e04cf24d03
commit
f6848b1451
@ -6,7 +6,13 @@ namespace canbus {
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static const char *TAG = "canbus";
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void Canbus::setup() { ESP_LOGCONFIG(TAG, "Setting up Canbus..."); }
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void Canbus::setup() {
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ESP_LOGCONFIG(TAG, "Setting up Canbus...");
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if (!this->setup_internal_()) {
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ESP_LOGE(TAG, "Canbus setup error!");
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this->mark_failed();
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}
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}
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void Canbus::dump_config() { ESP_LOGCONFIG(TAG, "Canbus: sender_id=%d", this->sender_id_); }
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@ -16,7 +22,7 @@ void Canbus::send(int can_id, uint8_t *data) {
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};
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void Canbus::loop() {
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//check harware inputbuffer and process to esphome outputs
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// check harware inputbuffer and process to esphome outputs
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}
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} // namespace canbus
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@ -21,17 +21,30 @@ class CanbusBinarySensor : public CanbusSensor, public binary_sensor::BinarySens
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class Canbus : public Component {
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public:
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Canbus(){};
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Canbus(const std::string &name){};
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void setup() override;
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void dump_config() override;
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float get_setup_priority() const override { return setup_priority::HARDWARE; }
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void loop() override;
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/* special address description flags for the CAN_ID */
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static const uint32_t CAN_EFF_FLAG = 0x80000000UL; /* EFF/SFF is set in the MSB */
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static const uint32_t CAN_RTR_FLAG = 0x40000000UL; /* remote transmission request */
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static const uint32_t CAN_ERR_FLAG = 0x20000000UL; /* error message frame */
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void send(int can_id, uint8_t *data);
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void register_can_device(CanbusSensor *component){};
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void set_sender_id(int sender_id) { this->sender_id_ = sender_id; }
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enum CAN_SPEED {
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/* valid bits in CAN ID for frame formats */
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static const uint32_t CAN_SFF_MASK = 0x000007FFUL; /* standard frame format (SFF) */
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static const uint32_t CAN_EFF_MASK = 0x1FFFFFFFUL; /* extended frame format (EFF) */
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static const uint32_t CAN_ERR_MASK = 0x1FFFFFFFUL; /* omit EFF, RTR, ERR flags */
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/*
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* Controller Area Network Identifier structure
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*
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* bit 0-28 : CAN identifier (11/29 bit)
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* bit 29 : error message frame flag (0 = data frame, 1 = error message)
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* bit 30 : remote transmission request flag (1 = rtr frame)
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* bit 31 : frame format flag (0 = standard 11 bit, 1 = extended 29 bit)
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*/
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typedef uint32_t canid_t;
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/* CAN payload length and DLC definitions according to ISO 11898-1 */
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static const uint8_t CAN_MAX_DLC = 8;
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static const uint8_t CAN_MAX_DLEN = 8;
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enum CAN_SPEED {
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CAN_5KBPS,
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CAN_10KBPS,
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CAN_20KBPS,
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@ -48,15 +61,27 @@ class Canbus : public Component {
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CAN_250KBPS,
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CAN_500KBPS,
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CAN_1000KBPS
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};
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enum ERROR : uint8_t {
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ERROR_OK = 0,
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ERROR_FAIL = 1,
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ERROR_ALLTXBUSY = 2,
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ERROR_FAILINIT = 3,
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ERROR_FAILTX = 4,
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ERROR_NOMSG = 5
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};
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};
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enum ERROR : uint8_t {
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ERROR_OK = 0,
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ERROR_FAIL = 1,
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ERROR_ALLTXBUSY = 2,
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ERROR_FAILINIT = 3,
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ERROR_FAILTX = 4,
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ERROR_NOMSG = 5
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};
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Canbus(){};
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Canbus(const std::string &name){};
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void setup() override;
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void dump_config() override;
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float get_setup_priority() const override { return setup_priority::HARDWARE; }
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void loop() override;
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void send(int can_id, uint8_t *data);
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void register_can_device(CanbusSensor *component){};
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void set_sender_id(int sender_id) { this->sender_id_ = sender_id; }
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protected:
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int sender_id_{0};
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virtual bool send_internal_(int can_id, uint8_t *data);
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@ -1,9 +1,8 @@
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import esphome.codegen as cg
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import esphome.config_validation as cv
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from esphome import pins
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from esphome.components import spi, canbus
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from esphome.const import CONF_CS_PIN, CONF_ID
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from esphome.components.canbus import CanbusComponent, CONF_CAN_ID
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from esphome.const import CONF_ID
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from esphome.components.canbus import CanbusComponent
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print("mcp2515.canbus.py")
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AUTO_LOAD = ['canbus']
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@ -14,7 +13,6 @@ mcp2515 = mcp2515_ns.class_('MCP2515', CanbusComponent, spi.SPIDevice)
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CONFIG_SCHEMA = canbus.CONFIG_SCHEMA.extend({
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cv.GenerateID(): cv.declare_id(mcp2515),
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cv.Required(CONF_CS_PIN): pins.gpio_output_pin_schema,
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}).extend(spi.SPI_DEVICE_SCHEMA)
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File diff suppressed because it is too large
Load Diff
@ -9,54 +9,62 @@ namespace esphome {
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namespace mcp2515 {
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class MCP2515 : public canbus::Canbus,
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public spi::SPIDevice<spi::BIT_ORDER_MSB_FIRST, spi::CLOCK_POLARITY_LOW,
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spi::CLOCK_PHASE_LEADING, spi::DATA_RATE_8MHZ> {
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public:
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public spi::SPIDevice<spi::BIT_ORDER_MSB_FIRST, spi::CLOCK_POLARITY_LOW, spi::CLOCK_PHASE_LEADING,
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spi::DATA_RATE_8MHZ> {
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public:
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MCP2515(){};
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void set_cs_pin(GPIOPin *cs_pin) { cs_pin_ = cs_pin; }
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static const uint32_t SPI_CLOCK = 10000000; // 10MHz
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/* special address description flags for the CAN_ID */
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static const uint32_t CAN_EFF_FLAG =
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0x80000000UL; /* EFF/SFF is set in the MSB */
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static const uint32_t CAN_RTR_FLAG =
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0x40000000UL; /* remote transmission request */
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static const uint32_t CAN_ERR_FLAG = 0x20000000UL; /* error message frame */
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/* valid bits in CAN ID for frame formats */
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static const uint32_t CAN_SFF_MASK =
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0x000007FFUL; /* standard frame format (SFF) */
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static const uint32_t CAN_EFF_MASK =
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0x1FFFFFFFUL; /* extended frame format (EFF) */
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static const uint32_t CAN_ERR_MASK =
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0x1FFFFFFFUL; /* omit EFF, RTR, ERR flags */
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static const uint32_t SPI_CLOCK = 10000000; // 10MHz
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static const int N_TXBUFFERS = 3;
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static const int N_RXBUFFERS = 2;
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/*
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* Controller Area Network Identifier structure
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*
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* bit 0-28 : CAN identifier (11/29 bit)
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* bit 29 : error message frame flag (0 = data frame, 1 = error message)
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* bit 30 : remote transmission request flag (1 = rtr frame)
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* bit 31 : frame format flag (0 = standard 11 bit, 1 = extended 29 bit)
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*/
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typedef uint32_t canid_t;
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enum CAN_CLOCK { MCP_20MHZ, MCP_16MHZ, MCP_8MHZ };
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enum MASK { MASK0, MASK1 };
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/* CAN payload length and DLC definitions according to ISO 11898-1 */
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static const uint8_t CAN_MAX_DLC = 8;
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static const uint8_t CAN_MAX_DLEN =8;
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enum RXF { RXF0 = 0, RXF1 = 1, RXF2 = 2, RXF3 = 3, RXF4 = 4, RXF5 = 5 };
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enum RXBn { RXB0 = 0, RXB1 = 1 };
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struct can_frame {
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enum TXBn { TXB0 = 0, TXB1 = 1, TXB2 = 2 };
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struct can_frame {
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canid_t can_id; /* 32 bit CAN_ID + EFF/RTR/ERR flags */
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uint8_t can_dlc; /* frame payload length in byte (0 .. CAN_MAX_DLEN) */
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uint8_t data[CAN_MAX_DLEN] __attribute__((aligned(8)));
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};
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uint8_t can_dlc; /* frame payload length in byte (0 .. CAN_MAX_DLEN) */
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uint8_t data[CAN_MAX_DLEN] __attribute__((aligned(8)));
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};
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enum CAN_CLKOUT {
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CLKOUT_DISABLE = -1,
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CLKOUT_DIV1 = 0x0,
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CLKOUT_DIV2 = 0x1,
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CLKOUT_DIV4 = 0x2,
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CLKOUT_DIV8 = 0x3,
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};
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enum /*class*/ CANINTF : uint8_t {
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CANINTF_RX0IF = 0x01,
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CANINTF_RX1IF = 0x02,
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CANINTF_TX0IF = 0x04,
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CANINTF_TX1IF = 0x08,
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CANINTF_TX2IF = 0x10,
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CANINTF_ERRIF = 0x20,
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CANINTF_WAKIF = 0x40,
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CANINTF_MERRF = 0x80
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};
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enum /*class*/ EFLG : uint8_t {
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EFLG_RX1OVR = (1 << 7),
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EFLG_RX0OVR = (1 << 6),
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EFLG_TXBO = (1 << 5),
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EFLG_TXEP = (1 << 4),
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EFLG_RXEP = (1 << 3),
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EFLG_TXWAR = (1 << 2),
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EFLG_RXWAR = (1 << 1),
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EFLG_EWARN = (1 << 0)
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};
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enum /*class*/ STAT : uint8_t { STAT_RX0IF = (1 << 0), STAT_RX1IF = (1 << 1) };
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static const struct TXBn_REGS {
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REGISTER CTRL;
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@ -71,47 +79,48 @@ struct can_frame {
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CANINTF CANINTF_RXnIF;
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} RXB[N_RXBUFFERS];
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static const uint8_t STAT_RXIF_MASK = STAT_RX0IF | STAT_RX1IF;
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static const uint8_t EFLG_ERRORMASK = EFLG_RX1OVR | EFLG_RX0OVR | EFLG_TXBO | EFLG_TXEP | EFLG_RXEP;
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protected:
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GPIOPin *cs_pin_;
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protected:
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bool send_internal_(int can_id, uint8_t *data) override;
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bool setup_internal_() override;
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ERROR set_mode_(const CANCTRL_REQOP_MODE mode);
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ERROR set_mode_(const CANCTRL_REQOP_MODE mode);
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uint8_t read_register_(const REGISTER reg);
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void read_registers_(const REGISTER reg, uint8_t values[], const uint8_t n);
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void set_register_(const REGISTER reg, const uint8_t value);
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void set_registers_(const REGISTER reg, uint8_t values[], const uint8_t n);
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void modify_register_(const REGISTER reg, const uint8_t mask, const uint8_t data);
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uint8_t read_register_(const REGISTER reg);
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void read_registers_(const REGISTER reg, uint8_t values[], const uint8_t n);
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void set_register_(const REGISTER reg, const uint8_t value);
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void set_registers_(const REGISTER reg, uint8_t values[], const uint8_t n);
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void modify_register_(const REGISTER reg, const uint8_t mask, const uint8_t data);
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void prepare_id_(uint8_t *buffer, const bool ext, const uint32_t id);
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ERROR reset_(void);
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ERROR set_config_mode_();
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ERROR set_listen_only_();
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ERROR set_sleep_mode_();
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ERROR set_loop_back_mode_();
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ERROR set_normal_mode_();
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ERROR set_clk_out_(const CAN_CLKOUT divisor);
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ERROR set_bitrate_(const CAN_SPEED canSpeed) override;
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ERROR set_bitrate_(const CAN_SPEED canSpeed, const CAN_CLOCK canClock);
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ERROR set_filter_mask_(const MASK num, const bool ext, const uint32_t ulData);
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ERROR set_filter_(const RXF num, const bool ext, const uint32_t ulData);
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ERROR send_message_(const TXBn txbn, const struct can_frame *frame);
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ERROR send_message_(const struct can_frame *frame);
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ERROR readMessage(const RXBn rxbn, struct can_frame *frame);
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ERROR readMessage(struct can_frame *frame);
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bool check_receive_(void);
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bool check_error_(void);
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uint8_t get_error_flags_(void);
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void clearRXnOVRFlags(void);
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uint8_t getInterrupts(void);
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uint8_t getInterruptMask(void);
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void clearInterrupts(void);
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void clearTXInterrupts(void);
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uint8_t get_status_(void);
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void clearRXnOVR(void);
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void clearMERR();
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void clearERRIF();
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void prepare_id_(uint8_t *buffer, const bool ext, const uint32_t id);
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ERROR reset_(void);
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ERROR set_config_mode_();
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ERROR set_listen_only_();
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ERROR set_sleep_mode_();
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ERROR set_loop_back_mode_();
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ERROR set_normal_mode_();
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ERROR set_clk_out_(const CAN_CLKOUT divisor);
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ERROR set_bitrate_(const CAN_SPEED canSpeed) override;
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ERROR set_bitrate_(const CAN_SPEED canSpeed, const CAN_CLOCK canClock);
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ERROR set_filter_mask_(const MASK num, const bool ext, const uint32_t ulData);
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ERROR set_filter_(const RXF num, const bool ext, const uint32_t ulData);
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ERROR send_message_(const TXBn txbn, const struct can_frame *frame);
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ERROR send_message_(const struct can_frame *frame);
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ERROR read_message_(const RXBn rxbn, struct can_frame *frame);
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ERROR read_message_(struct can_frame *frame);
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bool check_receive_(void);
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bool check_error_(void);
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uint8_t get_error_flags_(void);
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void clearRXnOVRFlags(void);
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uint8_t getInterrupts(void);
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uint8_t getInterruptMask(void);
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void clearInterrupts(void);
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void clearTXInterrupts(void);
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uint8_t get_status_(void);
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void clearRXnOVR(void);
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void clearMERR();
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void clearERRIF();
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};
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} // namespace mcp2515
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} // namespace esphome
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} // namespace mcp2515
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} // namespace esphome
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@ -3,386 +3,315 @@
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namespace esphome {
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namespace mcp2515 {
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enum CAN_CLOCK {
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MCP_20MHZ,
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MCP_16MHZ,
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MCP_8MHZ
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static const uint8_t CANCTRL_REQOP = 0xE0;
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static const uint8_t CANCTRL_ABAT = 0x10;
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static const uint8_t CANCTRL_OSM = 0x08;
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static const uint8_t CANCTRL_CLKEN = 0x04;
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static const uint8_t CANCTRL_CLKPRE = 0x03;
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enum /*class*/ CANCTRL_REQOP_MODE : uint8_t {
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CANCTRL_REQOP_NORMAL = 0x00,
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CANCTRL_REQOP_SLEEP = 0x20,
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CANCTRL_REQOP_LOOPBACK = 0x40,
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CANCTRL_REQOP_LISTENONLY = 0x60,
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CANCTRL_REQOP_CONFIG = 0x80,
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CANCTRL_REQOP_POWERUP = 0xE0
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};
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enum MASK {
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MASK0,
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MASK1
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};
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enum RXF {
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RXF0 = 0,
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RXF1 = 1,
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RXF2 = 2,
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RXF3 = 3,
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RXF4 = 4,
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RXF5 = 5
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};
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enum /*class*/ TXBnCTRL : uint8_t {
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TXB_ABTF = 0x40,
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TXB_MLOA = 0x20,
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TXB_TXERR = 0x10,
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TXB_TXREQ = 0x08,
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TXB_TXIE = 0x04,
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TXB_TXP = 0x03
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};
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enum RXBn {
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RXB0 = 0,
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RXB1 = 1
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};
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enum /*class*/ INSTRUCTION : uint8_t {
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INSTRUCTION_WRITE = 0x02,
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INSTRUCTION_READ = 0x03,
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INSTRUCTION_BITMOD = 0x05,
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INSTRUCTION_LOAD_TX0 = 0x40,
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INSTRUCTION_LOAD_TX1 = 0x42,
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INSTRUCTION_LOAD_TX2 = 0x44,
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INSTRUCTION_RTS_TX0 = 0x81,
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INSTRUCTION_RTS_TX1 = 0x82,
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INSTRUCTION_RTS_TX2 = 0x84,
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INSTRUCTION_RTS_ALL = 0x87,
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INSTRUCTION_READ_RX0 = 0x90,
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INSTRUCTION_READ_RX1 = 0x94,
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INSTRUCTION_READ_STATUS = 0xA0,
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INSTRUCTION_RX_STATUS = 0xB0,
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INSTRUCTION_RESET = 0xC0
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};
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enum TXBn {
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TXB0 = 0,
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TXB1 = 1,
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TXB2 = 2
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};
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enum /*class*/ REGISTER : uint8_t {
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MCP_RXF0SIDH = 0x00,
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MCP_RXF0SIDL = 0x01,
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MCP_RXF0EID8 = 0x02,
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MCP_RXF0EID0 = 0x03,
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MCP_RXF1SIDH = 0x04,
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MCP_RXF1SIDL = 0x05,
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MCP_RXF1EID8 = 0x06,
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MCP_RXF1EID0 = 0x07,
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MCP_RXF2SIDH = 0x08,
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MCP_RXF2SIDL = 0x09,
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MCP_RXF2EID8 = 0x0A,
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MCP_RXF2EID0 = 0x0B,
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MCP_CANSTAT = 0x0E,
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MCP_CANCTRL = 0x0F,
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MCP_RXF3SIDH = 0x10,
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MCP_RXF3SIDL = 0x11,
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MCP_RXF3EID8 = 0x12,
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MCP_RXF3EID0 = 0x13,
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MCP_RXF4SIDH = 0x14,
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MCP_RXF4SIDL = 0x15,
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MCP_RXF4EID8 = 0x16,
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MCP_RXF4EID0 = 0x17,
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MCP_RXF5SIDH = 0x18,
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MCP_RXF5SIDL = 0x19,
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MCP_RXF5EID8 = 0x1A,
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MCP_RXF5EID0 = 0x1B,
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MCP_TEC = 0x1C,
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MCP_REC = 0x1D,
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MCP_RXM0SIDH = 0x20,
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MCP_RXM0SIDL = 0x21,
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MCP_RXM0EID8 = 0x22,
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MCP_RXM0EID0 = 0x23,
|
||||
MCP_RXM1SIDH = 0x24,
|
||||
MCP_RXM1SIDL = 0x25,
|
||||
MCP_RXM1EID8 = 0x26,
|
||||
MCP_RXM1EID0 = 0x27,
|
||||
MCP_CNF3 = 0x28,
|
||||
MCP_CNF2 = 0x29,
|
||||
MCP_CNF1 = 0x2A,
|
||||
MCP_CANINTE = 0x2B,
|
||||
MCP_CANINTF = 0x2C,
|
||||
MCP_EFLG = 0x2D,
|
||||
MCP_TXB0CTRL = 0x30,
|
||||
MCP_TXB0SIDH = 0x31,
|
||||
MCP_TXB0SIDL = 0x32,
|
||||
MCP_TXB0EID8 = 0x33,
|
||||
MCP_TXB0EID0 = 0x34,
|
||||
MCP_TXB0DLC = 0x35,
|
||||
MCP_TXB0DATA = 0x36,
|
||||
MCP_TXB1CTRL = 0x40,
|
||||
MCP_TXB1SIDH = 0x41,
|
||||
MCP_TXB1SIDL = 0x42,
|
||||
MCP_TXB1EID8 = 0x43,
|
||||
MCP_TXB1EID0 = 0x44,
|
||||
MCP_TXB1DLC = 0x45,
|
||||
MCP_TXB1DATA = 0x46,
|
||||
MCP_TXB2CTRL = 0x50,
|
||||
MCP_TXB2SIDH = 0x51,
|
||||
MCP_TXB2SIDL = 0x52,
|
||||
MCP_TXB2EID8 = 0x53,
|
||||
MCP_TXB2EID0 = 0x54,
|
||||
MCP_TXB2DLC = 0x55,
|
||||
MCP_TXB2DATA = 0x56,
|
||||
MCP_RXB0CTRL = 0x60,
|
||||
MCP_RXB0SIDH = 0x61,
|
||||
MCP_RXB0SIDL = 0x62,
|
||||
MCP_RXB0EID8 = 0x63,
|
||||
MCP_RXB0EID0 = 0x64,
|
||||
MCP_RXB0DLC = 0x65,
|
||||
MCP_RXB0DATA = 0x66,
|
||||
MCP_RXB1CTRL = 0x70,
|
||||
MCP_RXB1SIDH = 0x71,
|
||||
MCP_RXB1SIDL = 0x72,
|
||||
MCP_RXB1EID8 = 0x73,
|
||||
MCP_RXB1EID0 = 0x74,
|
||||
MCP_RXB1DLC = 0x75,
|
||||
MCP_RXB1DATA = 0x76
|
||||
};
|
||||
|
||||
enum CAN_CLKOUT {
|
||||
CLKOUT_DISABLE = -1,
|
||||
CLKOUT_DIV1 = 0x0,
|
||||
CLKOUT_DIV2 = 0x1,
|
||||
CLKOUT_DIV4 = 0x2,
|
||||
CLKOUT_DIV8 = 0x3,
|
||||
};
|
||||
static const uint8_t CANSTAT_OPMOD = 0xE0;
|
||||
static const uint8_t CANSTAT_ICOD = 0x0E;
|
||||
|
||||
enum /*class*/ CANINTF : uint8_t {
|
||||
CANINTF_RX0IF = 0x01,
|
||||
CANINTF_RX1IF = 0x02,
|
||||
CANINTF_TX0IF = 0x04,
|
||||
CANINTF_TX1IF = 0x08,
|
||||
CANINTF_TX2IF = 0x10,
|
||||
CANINTF_ERRIF = 0x20,
|
||||
CANINTF_WAKIF = 0x40,
|
||||
CANINTF_MERRF = 0x80
|
||||
};
|
||||
static const uint8_t CNF3_SOF = 0x80;
|
||||
|
||||
enum /*class*/ EFLG : uint8_t {
|
||||
EFLG_RX1OVR = (1<<7),
|
||||
EFLG_RX0OVR = (1<<6),
|
||||
EFLG_TXBO = (1<<5),
|
||||
EFLG_TXEP = (1<<4),
|
||||
EFLG_RXEP = (1<<3),
|
||||
EFLG_TXWAR = (1<<2),
|
||||
EFLG_RXWAR = (1<<1),
|
||||
EFLG_EWARN = (1<<0)
|
||||
};
|
||||
static const uint8_t TXB_EXIDE_MASK = 0x08;
|
||||
static const uint8_t DLC_MASK = 0x0F;
|
||||
static const uint8_t RTR_MASK = 0x40;
|
||||
|
||||
static const uint8_t CANCTRL_REQOP = 0xE0;
|
||||
static const uint8_t CANCTRL_ABAT = 0x10;
|
||||
static const uint8_t CANCTRL_OSM = 0x08;
|
||||
static const uint8_t CANCTRL_CLKEN = 0x04;
|
||||
static const uint8_t CANCTRL_CLKPRE = 0x03;
|
||||
enum /*class*/ CANCTRL_REQOP_MODE : uint8_t {
|
||||
CANCTRL_REQOP_NORMAL = 0x00,
|
||||
CANCTRL_REQOP_SLEEP = 0x20,
|
||||
CANCTRL_REQOP_LOOPBACK = 0x40,
|
||||
CANCTRL_REQOP_LISTENONLY = 0x60,
|
||||
CANCTRL_REQOP_CONFIG = 0x80,
|
||||
CANCTRL_REQOP_POWERUP = 0xE0
|
||||
};
|
||||
static const uint8_t RXBnCTRL_RXM_STD = 0x20;
|
||||
static const uint8_t RXBnCTRL_RXM_EXT = 0x40;
|
||||
static const uint8_t RXBnCTRL_RXM_STDEXT = 0x00;
|
||||
static const uint8_t RXBnCTRL_RXM_MASK = 0x60;
|
||||
static const uint8_t RXBnCTRL_RTR = 0x08;
|
||||
static const uint8_t RXB0CTRL_BUKT = 0x04;
|
||||
|
||||
enum /*class*/ STAT : uint8_t {
|
||||
STAT_RX0IF = (1<<0),
|
||||
STAT_RX1IF = (1<<1)
|
||||
};
|
||||
|
||||
static const uint8_t STAT_RXIF_MASK = STAT_RX0IF | STAT_RX1IF;
|
||||
|
||||
enum /*class*/ TXBnCTRL : uint8_t {
|
||||
TXB_ABTF = 0x40,
|
||||
TXB_MLOA = 0x20,
|
||||
TXB_TXERR = 0x10,
|
||||
TXB_TXREQ = 0x08,
|
||||
TXB_TXIE = 0x04,
|
||||
TXB_TXP = 0x03
|
||||
};
|
||||
|
||||
static const uint8_t EFLG_ERRORMASK = EFLG_RX1OVR
|
||||
| EFLG_RX0OVR
|
||||
| EFLG_TXBO
|
||||
| EFLG_TXEP
|
||||
| EFLG_RXEP;
|
||||
|
||||
enum /*class*/ INSTRUCTION : uint8_t {
|
||||
INSTRUCTION_WRITE = 0x02,
|
||||
INSTRUCTION_READ = 0x03,
|
||||
INSTRUCTION_BITMOD = 0x05,
|
||||
INSTRUCTION_LOAD_TX0 = 0x40,
|
||||
INSTRUCTION_LOAD_TX1 = 0x42,
|
||||
INSTRUCTION_LOAD_TX2 = 0x44,
|
||||
INSTRUCTION_RTS_TX0 = 0x81,
|
||||
INSTRUCTION_RTS_TX1 = 0x82,
|
||||
INSTRUCTION_RTS_TX2 = 0x84,
|
||||
INSTRUCTION_RTS_ALL = 0x87,
|
||||
INSTRUCTION_READ_RX0 = 0x90,
|
||||
INSTRUCTION_READ_RX1 = 0x94,
|
||||
INSTRUCTION_READ_STATUS = 0xA0,
|
||||
INSTRUCTION_RX_STATUS = 0xB0,
|
||||
INSTRUCTION_RESET = 0xC0
|
||||
};
|
||||
|
||||
enum /*class*/ REGISTER : uint8_t {
|
||||
MCP_RXF0SIDH = 0x00,
|
||||
MCP_RXF0SIDL = 0x01,
|
||||
MCP_RXF0EID8 = 0x02,
|
||||
MCP_RXF0EID0 = 0x03,
|
||||
MCP_RXF1SIDH = 0x04,
|
||||
MCP_RXF1SIDL = 0x05,
|
||||
MCP_RXF1EID8 = 0x06,
|
||||
MCP_RXF1EID0 = 0x07,
|
||||
MCP_RXF2SIDH = 0x08,
|
||||
MCP_RXF2SIDL = 0x09,
|
||||
MCP_RXF2EID8 = 0x0A,
|
||||
MCP_RXF2EID0 = 0x0B,
|
||||
MCP_CANSTAT = 0x0E,
|
||||
MCP_CANCTRL = 0x0F,
|
||||
MCP_RXF3SIDH = 0x10,
|
||||
MCP_RXF3SIDL = 0x11,
|
||||
MCP_RXF3EID8 = 0x12,
|
||||
MCP_RXF3EID0 = 0x13,
|
||||
MCP_RXF4SIDH = 0x14,
|
||||
MCP_RXF4SIDL = 0x15,
|
||||
MCP_RXF4EID8 = 0x16,
|
||||
MCP_RXF4EID0 = 0x17,
|
||||
MCP_RXF5SIDH = 0x18,
|
||||
MCP_RXF5SIDL = 0x19,
|
||||
MCP_RXF5EID8 = 0x1A,
|
||||
MCP_RXF5EID0 = 0x1B,
|
||||
MCP_TEC = 0x1C,
|
||||
MCP_REC = 0x1D,
|
||||
MCP_RXM0SIDH = 0x20,
|
||||
MCP_RXM0SIDL = 0x21,
|
||||
MCP_RXM0EID8 = 0x22,
|
||||
MCP_RXM0EID0 = 0x23,
|
||||
MCP_RXM1SIDH = 0x24,
|
||||
MCP_RXM1SIDL = 0x25,
|
||||
MCP_RXM1EID8 = 0x26,
|
||||
MCP_RXM1EID0 = 0x27,
|
||||
MCP_CNF3 = 0x28,
|
||||
MCP_CNF2 = 0x29,
|
||||
MCP_CNF1 = 0x2A,
|
||||
MCP_CANINTE = 0x2B,
|
||||
MCP_CANINTF = 0x2C,
|
||||
MCP_EFLG = 0x2D,
|
||||
MCP_TXB0CTRL = 0x30,
|
||||
MCP_TXB0SIDH = 0x31,
|
||||
MCP_TXB0SIDL = 0x32,
|
||||
MCP_TXB0EID8 = 0x33,
|
||||
MCP_TXB0EID0 = 0x34,
|
||||
MCP_TXB0DLC = 0x35,
|
||||
MCP_TXB0DATA = 0x36,
|
||||
MCP_TXB1CTRL = 0x40,
|
||||
MCP_TXB1SIDH = 0x41,
|
||||
MCP_TXB1SIDL = 0x42,
|
||||
MCP_TXB1EID8 = 0x43,
|
||||
MCP_TXB1EID0 = 0x44,
|
||||
MCP_TXB1DLC = 0x45,
|
||||
MCP_TXB1DATA = 0x46,
|
||||
MCP_TXB2CTRL = 0x50,
|
||||
MCP_TXB2SIDH = 0x51,
|
||||
MCP_TXB2SIDL = 0x52,
|
||||
MCP_TXB2EID8 = 0x53,
|
||||
MCP_TXB2EID0 = 0x54,
|
||||
MCP_TXB2DLC = 0x55,
|
||||
MCP_TXB2DATA = 0x56,
|
||||
MCP_RXB0CTRL = 0x60,
|
||||
MCP_RXB0SIDH = 0x61,
|
||||
MCP_RXB0SIDL = 0x62,
|
||||
MCP_RXB0EID8 = 0x63,
|
||||
MCP_RXB0EID0 = 0x64,
|
||||
MCP_RXB0DLC = 0x65,
|
||||
MCP_RXB0DATA = 0x66,
|
||||
MCP_RXB1CTRL = 0x70,
|
||||
MCP_RXB1SIDH = 0x71,
|
||||
MCP_RXB1SIDL = 0x72,
|
||||
MCP_RXB1EID8 = 0x73,
|
||||
MCP_RXB1EID0 = 0x74,
|
||||
MCP_RXB1DLC = 0x75,
|
||||
MCP_RXB1DATA = 0x76
|
||||
};
|
||||
|
||||
static const uint8_t CANSTAT_OPMOD = 0xE0;
|
||||
static const uint8_t CANSTAT_ICOD = 0x0E;
|
||||
|
||||
static const uint8_t CNF3_SOF = 0x80;
|
||||
|
||||
static const uint8_t TXB_EXIDE_MASK = 0x08;
|
||||
static const uint8_t DLC_MASK = 0x0F;
|
||||
static const uint8_t RTR_MASK = 0x40;
|
||||
|
||||
static const uint8_t RXBnCTRL_RXM_STD = 0x20;
|
||||
static const uint8_t RXBnCTRL_RXM_EXT = 0x40;
|
||||
static const uint8_t RXBnCTRL_RXM_STDEXT = 0x00;
|
||||
static const uint8_t RXBnCTRL_RXM_MASK = 0x60;
|
||||
static const uint8_t RXBnCTRL_RTR = 0x08;
|
||||
static const uint8_t RXB0CTRL_BUKT = 0x04;
|
||||
|
||||
static const uint8_t MCP_SIDH = 0;
|
||||
static const uint8_t MCP_SIDL = 1;
|
||||
static const uint8_t MCP_EID8 = 2;
|
||||
static const uint8_t MCP_EID0 = 3;
|
||||
static const uint8_t MCP_DLC = 4;
|
||||
static const uint8_t MCP_DATA = 5;
|
||||
static const uint8_t MCP_SIDH = 0;
|
||||
static const uint8_t MCP_SIDL = 1;
|
||||
static const uint8_t MCP_EID8 = 2;
|
||||
static const uint8_t MCP_EID0 = 3;
|
||||
static const uint8_t MCP_DLC = 4;
|
||||
static const uint8_t MCP_DATA = 5;
|
||||
|
||||
/*
|
||||
* Speed 8M
|
||||
*/
|
||||
static const uint8_t MCP_8MHz_1000kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_8MHz_1000kBPS_CFG2 =0x80;
|
||||
static const uint8_t MCP_8MHz_1000kBPS_CFG3 =0x80;
|
||||
static const uint8_t MCP_8MHz_1000kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_8MHz_1000kBPS_CFG2 = 0x80;
|
||||
static const uint8_t MCP_8MHz_1000kBPS_CFG3 = 0x80;
|
||||
|
||||
static const uint8_t MCP_8MHz_500kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_8MHz_500kBPS_CFG2 =0x90;
|
||||
static const uint8_t MCP_8MHz_500kBPS_CFG3 =0x82;
|
||||
static const uint8_t MCP_8MHz_500kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_8MHz_500kBPS_CFG2 = 0x90;
|
||||
static const uint8_t MCP_8MHz_500kBPS_CFG3 = 0x82;
|
||||
|
||||
static const uint8_t MCP_8MHz_250kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_8MHz_250kBPS_CFG2 =0xB1;
|
||||
static const uint8_t MCP_8MHz_250kBPS_CFG3 =0x85;
|
||||
static const uint8_t MCP_8MHz_250kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_8MHz_250kBPS_CFG2 = 0xB1;
|
||||
static const uint8_t MCP_8MHz_250kBPS_CFG3 = 0x85;
|
||||
|
||||
static const uint8_t MCP_8MHz_200kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_8MHz_200kBPS_CFG2 =0xB4;
|
||||
static const uint8_t MCP_8MHz_200kBPS_CFG3 =0x86;
|
||||
static const uint8_t MCP_8MHz_200kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_8MHz_200kBPS_CFG2 = 0xB4;
|
||||
static const uint8_t MCP_8MHz_200kBPS_CFG3 = 0x86;
|
||||
|
||||
static const uint8_t MCP_8MHz_125kBPS_CFG1 =0x01;
|
||||
static const uint8_t MCP_8MHz_125kBPS_CFG2 =0xB1;
|
||||
static const uint8_t MCP_8MHz_125kBPS_CFG3 =0x85;
|
||||
static const uint8_t MCP_8MHz_125kBPS_CFG1 = 0x01;
|
||||
static const uint8_t MCP_8MHz_125kBPS_CFG2 = 0xB1;
|
||||
static const uint8_t MCP_8MHz_125kBPS_CFG3 = 0x85;
|
||||
|
||||
static const uint8_t MCP_8MHz_100kBPS_CFG1 =0x01;
|
||||
static const uint8_t MCP_8MHz_100kBPS_CFG2 =0xB4;
|
||||
static const uint8_t MCP_8MHz_100kBPS_CFG3 =0x86;
|
||||
static const uint8_t MCP_8MHz_100kBPS_CFG1 = 0x01;
|
||||
static const uint8_t MCP_8MHz_100kBPS_CFG2 = 0xB4;
|
||||
static const uint8_t MCP_8MHz_100kBPS_CFG3 = 0x86;
|
||||
|
||||
static const uint8_t MCP_8MHz_80kBPS_CFG1 =0x01;
|
||||
static const uint8_t MCP_8MHz_80kBPS_CFG2 =0xBF;
|
||||
static const uint8_t MCP_8MHz_80kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_8MHz_80kBPS_CFG1 = 0x01;
|
||||
static const uint8_t MCP_8MHz_80kBPS_CFG2 = 0xBF;
|
||||
static const uint8_t MCP_8MHz_80kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_8MHz_50kBPS_CFG1 =0x03;
|
||||
static const uint8_t MCP_8MHz_50kBPS_CFG2 =0xB4;
|
||||
static const uint8_t MCP_8MHz_50kBPS_CFG3 =0x86;
|
||||
static const uint8_t MCP_8MHz_50kBPS_CFG1 = 0x03;
|
||||
static const uint8_t MCP_8MHz_50kBPS_CFG2 = 0xB4;
|
||||
static const uint8_t MCP_8MHz_50kBPS_CFG3 = 0x86;
|
||||
|
||||
static const uint8_t MCP_8MHz_40kBPS_CFG1 =0x03;
|
||||
static const uint8_t MCP_8MHz_40kBPS_CFG2 =0xBF;
|
||||
static const uint8_t MCP_8MHz_40kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_8MHz_40kBPS_CFG1 = 0x03;
|
||||
static const uint8_t MCP_8MHz_40kBPS_CFG2 = 0xBF;
|
||||
static const uint8_t MCP_8MHz_40kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_8MHz_33k3BPS_CFG1 =0x47;
|
||||
static const uint8_t MCP_8MHz_33k3BPS_CFG2 =0xE2;
|
||||
static const uint8_t MCP_8MHz_33k3BPS_CFG3 =0x85;
|
||||
static const uint8_t MCP_8MHz_33k3BPS_CFG1 = 0x47;
|
||||
static const uint8_t MCP_8MHz_33k3BPS_CFG2 = 0xE2;
|
||||
static const uint8_t MCP_8MHz_33k3BPS_CFG3 = 0x85;
|
||||
|
||||
static const uint8_t MCP_8MHz_31k25BPS_CFG1 =0x07;
|
||||
static const uint8_t MCP_8MHz_31k25BPS_CFG2 =0xA4;
|
||||
static const uint8_t MCP_8MHz_31k25BPS_CFG3 =0x84;
|
||||
static const uint8_t MCP_8MHz_31k25BPS_CFG1 = 0x07;
|
||||
static const uint8_t MCP_8MHz_31k25BPS_CFG2 = 0xA4;
|
||||
static const uint8_t MCP_8MHz_31k25BPS_CFG3 = 0x84;
|
||||
|
||||
static const uint8_t MCP_8MHz_20kBPS_CFG1 =0x07;
|
||||
static const uint8_t MCP_8MHz_20kBPS_CFG2 =0xBF;
|
||||
static const uint8_t MCP_8MHz_20kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_8MHz_20kBPS_CFG1 = 0x07;
|
||||
static const uint8_t MCP_8MHz_20kBPS_CFG2 = 0xBF;
|
||||
static const uint8_t MCP_8MHz_20kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_8MHz_10kBPS_CFG1 =0x0F;
|
||||
static const uint8_t MCP_8MHz_10kBPS_CFG2 =0xBF;
|
||||
static const uint8_t MCP_8MHz_10kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_8MHz_10kBPS_CFG1 = 0x0F;
|
||||
static const uint8_t MCP_8MHz_10kBPS_CFG2 = 0xBF;
|
||||
static const uint8_t MCP_8MHz_10kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_8MHz_5kBPS_CFG1 =0x1F;
|
||||
static const uint8_t MCP_8MHz_5kBPS_CFG2 =0xBF;
|
||||
static const uint8_t MCP_8MHz_5kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_8MHz_5kBPS_CFG1 = 0x1F;
|
||||
static const uint8_t MCP_8MHz_5kBPS_CFG2 = 0xBF;
|
||||
static const uint8_t MCP_8MHz_5kBPS_CFG3 = 0x87;
|
||||
|
||||
/*
|
||||
* speed 16M
|
||||
*/
|
||||
static const uint8_t MCP_16MHz_1000kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_16MHz_1000kBPS_CFG2 =0xD0;
|
||||
static const uint8_t MCP_16MHz_1000kBPS_CFG3 =0x82;
|
||||
static const uint8_t MCP_16MHz_1000kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_16MHz_1000kBPS_CFG2 = 0xD0;
|
||||
static const uint8_t MCP_16MHz_1000kBPS_CFG3 = 0x82;
|
||||
|
||||
static const uint8_t MCP_16MHz_500kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_16MHz_500kBPS_CFG2 =0xF0;
|
||||
static const uint8_t MCP_16MHz_500kBPS_CFG3 =0x86;
|
||||
static const uint8_t MCP_16MHz_500kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_16MHz_500kBPS_CFG2 = 0xF0;
|
||||
static const uint8_t MCP_16MHz_500kBPS_CFG3 = 0x86;
|
||||
|
||||
static const uint8_t MCP_16MHz_250kBPS_CFG1 =0x41;
|
||||
static const uint8_t MCP_16MHz_250kBPS_CFG2 =0xF1;
|
||||
static const uint8_t MCP_16MHz_250kBPS_CFG3 =0x85;
|
||||
static const uint8_t MCP_16MHz_250kBPS_CFG1 = 0x41;
|
||||
static const uint8_t MCP_16MHz_250kBPS_CFG2 = 0xF1;
|
||||
static const uint8_t MCP_16MHz_250kBPS_CFG3 = 0x85;
|
||||
|
||||
static const uint8_t MCP_16MHz_200kBPS_CFG1 =0x01;
|
||||
static const uint8_t MCP_16MHz_200kBPS_CFG2 =0xFA;
|
||||
static const uint8_t MCP_16MHz_200kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_200kBPS_CFG1 = 0x01;
|
||||
static const uint8_t MCP_16MHz_200kBPS_CFG2 = 0xFA;
|
||||
static const uint8_t MCP_16MHz_200kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_16MHz_125kBPS_CFG1 =0x03;
|
||||
static const uint8_t MCP_16MHz_125kBPS_CFG2 =0xF0;
|
||||
static const uint8_t MCP_16MHz_125kBPS_CFG3 =0x86;
|
||||
static const uint8_t MCP_16MHz_125kBPS_CFG1 = 0x03;
|
||||
static const uint8_t MCP_16MHz_125kBPS_CFG2 = 0xF0;
|
||||
static const uint8_t MCP_16MHz_125kBPS_CFG3 = 0x86;
|
||||
|
||||
static const uint8_t MCP_16MHz_100kBPS_CFG1 =0x03;
|
||||
static const uint8_t MCP_16MHz_100kBPS_CFG2 =0xFA;
|
||||
static const uint8_t MCP_16MHz_100kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_100kBPS_CFG1 = 0x03;
|
||||
static const uint8_t MCP_16MHz_100kBPS_CFG2 = 0xFA;
|
||||
static const uint8_t MCP_16MHz_100kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_16MHz_80kBPS_CFG1 =0x03;
|
||||
static const uint8_t MCP_16MHz_80kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_16MHz_80kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_80kBPS_CFG1 = 0x03;
|
||||
static const uint8_t MCP_16MHz_80kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_16MHz_80kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_16MHz_83k3BPS_CFG1 =0x03;
|
||||
static const uint8_t MCP_16MHz_83k3BPS_CFG2 =0xBE;
|
||||
static const uint8_t MCP_16MHz_83k3BPS_CFG3 =0x07;
|
||||
static const uint8_t MCP_16MHz_83k3BPS_CFG1 = 0x03;
|
||||
static const uint8_t MCP_16MHz_83k3BPS_CFG2 = 0xBE;
|
||||
static const uint8_t MCP_16MHz_83k3BPS_CFG3 = 0x07;
|
||||
|
||||
static const uint8_t MCP_16MHz_50kBPS_CFG1 =0x07;
|
||||
static const uint8_t MCP_16MHz_50kBPS_CFG2 =0xFA;
|
||||
static const uint8_t MCP_16MHz_50kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_50kBPS_CFG1 = 0x07;
|
||||
static const uint8_t MCP_16MHz_50kBPS_CFG2 = 0xFA;
|
||||
static const uint8_t MCP_16MHz_50kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_16MHz_40kBPS_CFG1 =0x07;
|
||||
static const uint8_t MCP_16MHz_40kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_16MHz_40kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_40kBPS_CFG1 = 0x07;
|
||||
static const uint8_t MCP_16MHz_40kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_16MHz_40kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_16MHz_33k3BPS_CFG1 =0x4E;
|
||||
static const uint8_t MCP_16MHz_33k3BPS_CFG2 =0xF1;
|
||||
static const uint8_t MCP_16MHz_33k3BPS_CFG3 =0x85;
|
||||
static const uint8_t MCP_16MHz_33k3BPS_CFG1 = 0x4E;
|
||||
static const uint8_t MCP_16MHz_33k3BPS_CFG2 = 0xF1;
|
||||
static const uint8_t MCP_16MHz_33k3BPS_CFG3 = 0x85;
|
||||
|
||||
static const uint8_t MCP_16MHz_20kBPS_CFG1 =0x0F;
|
||||
static const uint8_t MCP_16MHz_20kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_16MHz_20kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_20kBPS_CFG1 = 0x0F;
|
||||
static const uint8_t MCP_16MHz_20kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_16MHz_20kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_16MHz_10kBPS_CFG1 =0x1F;
|
||||
static const uint8_t MCP_16MHz_10kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_16MHz_10kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_10kBPS_CFG1 = 0x1F;
|
||||
static const uint8_t MCP_16MHz_10kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_16MHz_10kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_16MHz_5kBPS_CFG1 =0x3F;
|
||||
static const uint8_t MCP_16MHz_5kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_16MHz_5kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_16MHz_5kBPS_CFG1 = 0x3F;
|
||||
static const uint8_t MCP_16MHz_5kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_16MHz_5kBPS_CFG3 = 0x87;
|
||||
|
||||
/*
|
||||
* speed 20M
|
||||
*/
|
||||
static const uint8_t MCP_20MHz_1000kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_20MHz_1000kBPS_CFG2 =0xD9;
|
||||
static const uint8_t MCP_20MHz_1000kBPS_CFG3 =0x82;
|
||||
static const uint8_t MCP_20MHz_1000kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_20MHz_1000kBPS_CFG2 = 0xD9;
|
||||
static const uint8_t MCP_20MHz_1000kBPS_CFG3 = 0x82;
|
||||
|
||||
static const uint8_t MCP_20MHz_500kBPS_CFG1 =0x00;
|
||||
static const uint8_t MCP_20MHz_500kBPS_CFG2 =0xFA;
|
||||
static const uint8_t MCP_20MHz_500kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_500kBPS_CFG1 = 0x00;
|
||||
static const uint8_t MCP_20MHz_500kBPS_CFG2 = 0xFA;
|
||||
static const uint8_t MCP_20MHz_500kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_250kBPS_CFG1 =0x41;
|
||||
static const uint8_t MCP_20MHz_250kBPS_CFG2 =0xFB;
|
||||
static const uint8_t MCP_20MHz_250kBPS_CFG3 =0x86;
|
||||
static const uint8_t MCP_20MHz_250kBPS_CFG1 = 0x41;
|
||||
static const uint8_t MCP_20MHz_250kBPS_CFG2 = 0xFB;
|
||||
static const uint8_t MCP_20MHz_250kBPS_CFG3 = 0x86;
|
||||
|
||||
static const uint8_t MCP_20MHz_200kBPS_CFG1 =0x01;
|
||||
static const uint8_t MCP_20MHz_200kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_20MHz_200kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_200kBPS_CFG1 = 0x01;
|
||||
static const uint8_t MCP_20MHz_200kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_20MHz_200kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_125kBPS_CFG1 =0x03;
|
||||
static const uint8_t MCP_20MHz_125kBPS_CFG2 =0xFA;
|
||||
static const uint8_t MCP_20MHz_125kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_125kBPS_CFG1 = 0x03;
|
||||
static const uint8_t MCP_20MHz_125kBPS_CFG2 = 0xFA;
|
||||
static const uint8_t MCP_20MHz_125kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_100kBPS_CFG1 =0x04;
|
||||
static const uint8_t MCP_20MHz_100kBPS_CFG2 =0xFA;
|
||||
static const uint8_t MCP_20MHz_100kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_100kBPS_CFG1 = 0x04;
|
||||
static const uint8_t MCP_20MHz_100kBPS_CFG2 = 0xFA;
|
||||
static const uint8_t MCP_20MHz_100kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_83k3BPS_CFG1 =0x04;
|
||||
static const uint8_t MCP_20MHz_83k3BPS_CFG2 =0xFE;
|
||||
static const uint8_t MCP_20MHz_83k3BPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_83k3BPS_CFG1 = 0x04;
|
||||
static const uint8_t MCP_20MHz_83k3BPS_CFG2 = 0xFE;
|
||||
static const uint8_t MCP_20MHz_83k3BPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_80kBPS_CFG1 =0x04;
|
||||
static const uint8_t MCP_20MHz_80kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_20MHz_80kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_80kBPS_CFG1 = 0x04;
|
||||
static const uint8_t MCP_20MHz_80kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_20MHz_80kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_50kBPS_CFG1 =0x09;
|
||||
static const uint8_t MCP_20MHz_50kBPS_CFG2 =0xFA;
|
||||
static const uint8_t MCP_20MHz_50kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_50kBPS_CFG1 = 0x09;
|
||||
static const uint8_t MCP_20MHz_50kBPS_CFG2 = 0xFA;
|
||||
static const uint8_t MCP_20MHz_50kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_40kBPS_CFG1 =0x09;
|
||||
static const uint8_t MCP_20MHz_40kBPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_20MHz_40kBPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_40kBPS_CFG1 = 0x09;
|
||||
static const uint8_t MCP_20MHz_40kBPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_20MHz_40kBPS_CFG3 = 0x87;
|
||||
|
||||
static const uint8_t MCP_20MHz_33k3BPS_CFG1 =0x0B;
|
||||
static const uint8_t MCP_20MHz_33k3BPS_CFG2 =0xFF;
|
||||
static const uint8_t MCP_20MHz_33k3BPS_CFG3 =0x87;
|
||||
static const uint8_t MCP_20MHz_33k3BPS_CFG1 = 0x0B;
|
||||
static const uint8_t MCP_20MHz_33k3BPS_CFG2 = 0xFF;
|
||||
static const uint8_t MCP_20MHz_33k3BPS_CFG3 = 0x87;
|
||||
|
||||
}}
|
||||
} // namespace mcp2515
|
||||
} // namespace esphome
|
||||
Loading…
x
Reference in New Issue
Block a user