[sn74hc595] Enforce type field to distinguish gpio vs spi mode (#6609)

esphome/components/sn74hc595/__init__.py

@@ -4,14 +4,13 @@ from esphome import pins
 from esphome.components import spi
 from esphome.const import (
     CONF_ID,
-    CONF_SPI_ID,
     CONF_NUMBER,
     CONF_INVERTED,
     CONF_DATA_PIN,
     CONF_CLOCK_PIN,
     CONF_OUTPUT,
+    CONF_TYPE,
 )
-from esphome.core import EsphomeError
 
 MULTI_CONF = True
 
@@ -34,53 +33,53 @@ CONF_LATCH_PIN = "latch_pin"
 CONF_OE_PIN = "oe_pin"
 CONF_SR_COUNT = "sr_count"
 
-CONFIG_SCHEMA = cv.Any(
-    cv.Schema(
+TYPE_GPIO = "gpio"
+TYPE_SPI = "spi"
+
+_COMMON_SCHEMA = cv.Schema(
     {
-            cv.Required(CONF_ID): cv.declare_id(SN74HC595GPIOComponent),
-            cv.Required(CONF_DATA_PIN): pins.gpio_output_pin_schema,
-            cv.Required(CONF_CLOCK_PIN): pins.gpio_output_pin_schema,
-            cv.Required(CONF_LATCH_PIN): pins.gpio_output_pin_schema,
-            cv.Optional(CONF_OE_PIN): pins.gpio_output_pin_schema,
-            cv.Optional(CONF_SR_COUNT, default=1): cv.int_range(min=1, max=256),
-        }
-    ).extend(cv.COMPONENT_SCHEMA),
-    cv.Schema(
-        {
-            cv.Required(CONF_ID): cv.declare_id(SN74HC595SPIComponent),
         cv.Required(CONF_LATCH_PIN): pins.gpio_output_pin_schema,
         cv.Optional(CONF_OE_PIN): pins.gpio_output_pin_schema,
         cv.Optional(CONF_SR_COUNT, default=1): cv.int_range(min=1, max=256),
     }
 )
-    .extend(cv.COMPONENT_SCHEMA)
-    .extend(spi.spi_device_schema(cs_pin_required=False))
-    .extend(
+
+CONFIG_SCHEMA = cv.typed_schema(
     {
-            cv.Required(CONF_SPI_ID): cv.use_id(spi.SPIComponent),
+        TYPE_GPIO: _COMMON_SCHEMA.extend(
+            {
+                cv.Required(CONF_ID): cv.declare_id(SN74HC595GPIOComponent),
+                cv.Required(CONF_DATA_PIN): pins.gpio_output_pin_schema,
+                cv.Required(CONF_CLOCK_PIN): pins.gpio_output_pin_schema,
             }
-    ),
-    msg='Either "data_pin" and "clock_pin" must be set or "spi_id" must be set.',
+        ).extend(cv.COMPONENT_SCHEMA),
+        TYPE_SPI: _COMMON_SCHEMA.extend(
+            {
+                cv.Required(CONF_ID): cv.declare_id(SN74HC595SPIComponent),
+            }
+        )
+        .extend(cv.COMPONENT_SCHEMA)
+        .extend(spi.spi_device_schema(cs_pin_required=False)),
+    },
+    default_type=TYPE_GPIO,
 )
 
 
 async def to_code(config):
     var = cg.new_Pvariable(config[CONF_ID])
     await cg.register_component(var, config)
-    if CONF_DATA_PIN in config:
+    if config[CONF_TYPE] == TYPE_GPIO:
         data_pin = await cg.gpio_pin_expression(config[CONF_DATA_PIN])
         cg.add(var.set_data_pin(data_pin))
         clock_pin = await cg.gpio_pin_expression(config[CONF_CLOCK_PIN])
         cg.add(var.set_clock_pin(clock_pin))
-    elif CONF_SPI_ID in config:
-        await spi.register_spi_device(var, config)
     else:
-        raise EsphomeError("Not supported")
+        await spi.register_spi_device(var, config)
 
     latch_pin = await cg.gpio_pin_expression(config[CONF_LATCH_PIN])
     cg.add(var.set_latch_pin(latch_pin))
-    if CONF_OE_PIN in config:
-        oe_pin = await cg.gpio_pin_expression(config[CONF_OE_PIN])
+    if oe_pin := config.get(CONF_OE_PIN):
+        oe_pin = await cg.gpio_pin_expression(oe_pin)
         cg.add(var.set_oe_pin(oe_pin))
     cg.add(var.set_sr_count(config[CONF_SR_COUNT]))
 

tests/components/sn74hc595/test.esp32-c3-idf.yaml

@@ -0,0 +1,27 @@
+spi:
+  - id: spi_sn74hc595
+    clk_pin: 6
+    mosi_pin: 7
+    miso_pin: 5
+
+sn74hc595:
+  - id: sn74hc595_hub
+    clock_pin: 0
+    data_pin: 1
+    latch_pin: 2
+    oe_pin: 3
+    sr_count: 2
+  - id: sn74hc595_hub_2
+    latch_pin: 8
+    oe_pin: 9
+    spi_id: spi_sn74hc595
+    type: spi
+    sr_count: 2
+
+switch:
+  - platform: gpio
+    name: SN74HC595 Pin 0
+    pin:
+      sn74hc595: sn74hc595_hub_2
+      number: 0
+      inverted: false

tests/components/sn74hc595/test.esp32-c3.yaml

@@ -0,0 +1,27 @@
+spi:
+  - id: spi_sn74hc595
+    clk_pin: 6
+    mosi_pin: 7
+    miso_pin: 5
+
+sn74hc595:
+  - id: sn74hc595_hub
+    clock_pin: 0
+    data_pin: 1
+    latch_pin: 2
+    oe_pin: 3
+    sr_count: 2
+  - id: sn74hc595_hub_2
+    latch_pin: 8
+    oe_pin: 9
+    spi_id: spi_sn74hc595
+    type: spi
+    sr_count: 2
+
+switch:
+  - platform: gpio
+    name: SN74HC595 Pin 0
+    pin:
+      sn74hc595: sn74hc595_hub_2
+      number: 0
+      inverted: false

tests/components/sn74hc595/test.esp32-idf.yaml

@@ -0,0 +1,27 @@
+spi:
+  - id: spi_sn74hc595
+    clk_pin: 16
+    mosi_pin: 17
+    miso_pin: 15
+
+sn74hc595:
+  - id: sn74hc595_hub
+    clock_pin: 12
+    data_pin: 13
+    latch_pin: 14
+    oe_pin: 18
+    sr_count: 2
+  - id: sn74hc595_hub_2
+    latch_pin: 21
+    oe_pin: 22
+    spi_id: spi_sn74hc595
+    type: spi
+    sr_count: 2
+
+switch:
+  - platform: gpio
+    name: SN74HC595 Pin 0
+    pin:
+      sn74hc595: sn74hc595_hub_2
+      number: 0
+      inverted: false

tests/components/sn74hc595/test.esp32.yaml

@@ -0,0 +1,27 @@
+spi:
+  - id: spi_sn74hc595
+    clk_pin: 16
+    mosi_pin: 17
+    miso_pin: 15
+
+sn74hc595:
+  - id: sn74hc595_hub
+    clock_pin: 12
+    data_pin: 13
+    latch_pin: 14
+    oe_pin: 18
+    sr_count: 2
+  - id: sn74hc595_hub_2
+    latch_pin: 21
+    oe_pin: 22
+    spi_id: spi_sn74hc595
+    type: spi
+    sr_count: 2
+
+switch:
+  - platform: gpio
+    name: SN74HC595 Pin 0
+    pin:
+      sn74hc595: sn74hc595_hub_2
+      number: 0
+      inverted: false

tests/components/sn74hc595/test.esp8266.yaml

@@ -0,0 +1,27 @@
+spi:
+  - id: spi_sn74hc595
+    clk_pin: 14
+    mosi_pin: 13
+    miso_pin: 12
+
+sn74hc595:
+  - id: sn74hc595_hub
+    clock_pin: 0
+    data_pin: 2
+    latch_pin: 4
+    oe_pin: 5
+    sr_count: 2
+  - id: sn74hc595_hub_2
+    latch_pin: 15
+    oe_pin: 16
+    spi_id: spi_sn74hc595
+    type: spi
+    sr_count: 2
+
+switch:
+  - platform: gpio
+    name: SN74HC595 Pin 0
+    pin:
+      sn74hc595: sn74hc595_hub_2
+      number: 0
+      inverted: false

tests/components/sn74hc595/test.rp2040.yaml

@@ -0,0 +1,27 @@
+spi:
+  - id: spi_sn74hc595
+    clk_pin: 6
+    mosi_pin: 5
+    miso_pin: 4
+
+sn74hc595:
+  - id: sn74hc595_hub
+    clock_pin: 0
+    data_pin: 1
+    latch_pin: 2
+    oe_pin: 3
+    sr_count: 2
+  - id: sn74hc595_hub_2
+    latch_pin: 8
+    oe_pin: 9
+    spi_id: spi_sn74hc595
+    type: spi
+    sr_count: 2
+
+switch:
+  - platform: gpio
+    name: SN74HC595 Pin 0
+    pin:
+      sn74hc595: sn74hc595_hub_2
+      number: 0
+      inverted: false

tests/test1.yaml

@@ -3996,6 +3996,7 @@ sn74hc595:
       number: GPIO32
     sr_count: 2
     spi_id: spi_bus
+    type: spi
 
 rtttl:
   output: gpio_19