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Code Issues Releases Wiki Activity

Add ESP8266 core v2.6.2 (#905)

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* Add ESP8266 core v2.6.2

* Upstream ESP8266 Wifi fixes

* Replace disable_interrupt with InterruptLock C++ class

* Update code to use InterruptLock

* Lint

* Update dht.cpp

* Improve InterruptLock docs, mark as ICACHE_RAM_ATTR

* Fixes
This commit is contained in:
Otto Winter
2019-12-04 19:30:10 +01:00
committed by GitHub
parent bba6d6897d
commit 7a6df38515
12 changed files with 291 additions and 180 deletions
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28
esphome/core/helpers.cpp
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@@ -156,21 +156,6 @@ ParseOnOffState parse_on_off(const char *str, const char *on, const char *off) {
const char *HOSTNAME_CHARACTER_WHITELIST = "abcdefghijklmnopqrstuvwxyzABCDEFGHIJKLMNOPQRSTUVWXYZ0123456789-_";
void disable_interrupts() {
#ifdef ARDUINO_ARCH_ESP32
portDISABLE_INTERRUPTS();
#else
noInterrupts();
#endif
}
void enable_interrupts() {
#ifdef ARDUINO_ARCH_ESP32
portENABLE_INTERRUPTS();
#else
interrupts();
#endif
}
uint8_t crc8(uint8_t *data, uint8_t len) {
uint8_t crc = 0;
@@ -193,8 +178,8 @@ void delay_microseconds_accurate(uint32_t usec) {
if (usec <= 16383UL) {
delayMicroseconds(usec);
} else {
delay(usec / 1000UL);
delayMicroseconds(usec % 1000UL);
delay(usec / 16383UL);
delayMicroseconds(usec % 16383UL);
}
}
@@ -330,4 +315,13 @@ std::string hexencode(const uint8_t *data, uint32_t len) {
return res;
}
#ifdef ARDUINO_ARCH_ESP8266
ICACHE_RAM_ATTR InterruptLock::InterruptLock() { xt_state_ = xt_rsil(15); }
ICACHE_RAM_ATTR InterruptLock::~InterruptLock() { xt_wsr_ps(xt_state_); }
#endif
#ifdef ARDUINO_ARCH_ESP32
ICACHE_RAM_ATTR InterruptLock::InterruptLock() { portENABLE_INTERRUPTS(); }
ICACHE_RAM_ATTR InterruptLock::~InterruptLock() { portDISABLE_INTERRUPTS(); }
#endif
} // namespace esphome