Refactor SPI code; Add ESP-IDF hardware support (#5311)

* Checkpoint * Checkpoint * Checkpoint * Revert hal change * Checkpoint * Checkpoint * Checkpoint * Checkpoint * ESP-IDF working * clang-format * use bus_list * Add spi_device; fix 16 bit transfer. * Enable multi_conf; Fix LSB 16 bit transactions * Formatting fixes * Clang-format, codeowners * Add test * Formatting * clang tidy * clang-format * clang-tidy * clang-format * Checkpoint * Checkpoint * Checkpoint * Revert hal change * Checkpoint * Checkpoint * Checkpoint * Checkpoint * ESP-IDF working * clang-format * use bus_list * Add spi_device; fix 16 bit transfer. * Enable multi_conf; Fix LSB 16 bit transactions * Formatting fixes * Clang-format, codeowners * Add test * Formatting * clang tidy * clang-format * clang-tidy * clang-format * Clang-tidy * Clang-format * clang-tidy * clang-tidy * Fix ESP8266 * RP2040 * RP2040 * Avoid use of spi1 as id * Refactor SPI code. Add support for ESP-IDF hardware SPI * Force SW only for RP2040 * Break up large transfers * Add interface: option for spi. validate pins in python. * Can't use match/case with Python 3.9. Check for inverted pins. * Work around target_platform issue with * Remove debug code * Optimize write_array16 * Show errors in hex * Only one spi on ESP32Cx variants * Ensure bus is claimed before asserting /CS. * Check on init/deinit * Allow maximum rate write only SPI on GPIO MUXed pins. * Clang-format * Clang-tidy * Fix issue with reads. * Finger trouble... * Make comment about missing SPI on Cx variants * Pacify CI clang-format. Did not complain locally?? * Restore 8266 to its former SPI glory * Fix per clang-format * Move validation and choice of SPI into Python code. * Add test for interface: config * Fix issues found on self-review. --------- Co-authored-by: Keith Burzinski <kbx81x@gmail.com>
2025-11-20 16:55:49 +00:00 · 2023-09-08 17:27:19 +10:00
parent ce171f5c00
commit 5c26f95a4b
11 changed files with 954 additions and 473 deletions
--- a/esphome/components/spi_device/init.py
+++ b/esphome/components/spi_device/init.py
@@ -0,0 +1,49 @@
+import esphome.codegen as cg
+import esphome.config_validation as cv
+from esphome.components import spi
+from esphome.const import CONF_ID, CONF_DATA_RATE, CONF_MODE
+
+DEPENDENCIES = ["spi"]
+CODEOWNERS = ["@clydebarrow"]
+
+MULTI_CONF = True
+spi_device_ns = cg.esphome_ns.namespace("spi_device")
+
+spi_device = spi_device_ns.class_("SPIDeviceComponent", cg.Component, spi.SPIDevice)
+
+Mode = spi.spi_ns.enum("SPIMode")
+MODES = {
+    "0": Mode.MODE0,
+    "1": Mode.MODE1,
+    "2": Mode.MODE2,
+    "3": Mode.MODE3,
+    "MODE0": Mode.MODE0,
+    "MODE1": Mode.MODE1,
+    "MODE2": Mode.MODE2,
+    "MODE3": Mode.MODE3,
+}
+
+BitOrder = spi.spi_ns.enum("SPIBitOrder")
+ORDERS = {
+    "msb_first": BitOrder.BIT_ORDER_MSB_FIRST,
+    "lsb_first": BitOrder.BIT_ORDER_LSB_FIRST,
+}
+CONF_BIT_ORDER = "bit_order"
+
+CONFIG_SCHEMA = cv.Schema(
+    {
+        cv.GenerateID(CONF_ID): cv.declare_id(spi_device),
+        cv.Optional(CONF_DATA_RATE, default="1MHz"): spi.SPI_DATA_RATE_SCHEMA,
+        cv.Optional(CONF_BIT_ORDER, default="msb_first"): cv.enum(ORDERS, lower=True),
+        cv.Optional(CONF_MODE, default="0"): cv.enum(MODES, upper=True),
+    }
+).extend(spi.spi_device_schema(False))
+
+
+async def to_code(config):
+    var = cg.new_Pvariable(config[CONF_ID])
+    await cg.register_component(var, config)
+    cg.add(var.set_data_rate(config[CONF_DATA_RATE]))
+    cg.add(var.set_mode(config[CONF_MODE]))
+    cg.add(var.set_bit_order(config[CONF_BIT_ORDER]))
+    await spi.register_spi_device(var, config)
--- a/esphome/components/spi_device/spi_device.cpp
+++ b/esphome/components/spi_device/spi_device.cpp
@@ -0,0 +1,30 @@
+#include "spi_device.h"
+#include "esphome/core/log.h"
+#include "esphome/core/hal.h"
+
+namespace esphome {
+namespace spi_device {
+
+static const char *const TAG = "spi_device";
+
+void SPIDeviceComponent::setup() {
+  ESP_LOGD(TAG, "Setting up SPIDevice...");
+  this->spi_setup();
+  ESP_LOGCONFIG(TAG, "SPIDevice started!");
+}
+
+void SPIDeviceComponent::dump_config() {
+  ESP_LOGCONFIG(TAG, "SPIDevice");
+  LOG_PIN("  CS pin: ", this->cs_);
+  ESP_LOGCONFIG(TAG, "  Mode: %d", this->mode_);
+  if (this->data_rate_ < 1000000) {
+    ESP_LOGCONFIG(TAG, "  Data rate: %dkHz", this->data_rate_ / 1000);
+  } else {
+    ESP_LOGCONFIG(TAG, "  Data rate: %dMHz", this->data_rate_ / 1000000);
+  }
+}
+
+float SPIDeviceComponent::get_setup_priority() const { return setup_priority::DATA; }
+
+}  // namespace spi_device
+}  // namespace esphome
--- a/esphome/components/spi_device/spi_device.h
+++ b/esphome/components/spi_device/spi_device.h
@@ -0,0 +1,22 @@
+#pragma once
+
+#include "esphome/core/component.h"
+#include "esphome/components/spi/spi.h"
+
+namespace esphome {
+namespace spi_device {
+
+class SPIDeviceComponent : public Component,
+                           public spi::SPIDevice<spi::BIT_ORDER_MSB_FIRST, spi::CLOCK_POLARITY_HIGH,
+                                                 spi::CLOCK_PHASE_TRAILING, spi::DATA_RATE_1MHZ> {
+ public:
+  void setup() override;
+  void dump_config() override;
+
+  float get_setup_priority() const override;
+
+ protected:
+};
+
+}  // namespace spi_device
+}  // namespace esphome