mirror of
https://github.com/esphome/esphome.git
synced 2025-09-05 12:52:19 +01:00
fix clang-format
This commit is contained in:
@@ -15,17 +15,14 @@
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#define MANUFACTURER_ID 0x0059
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// "nRF Connect" app can be used to detect beacon
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uint8_t beaconUuid[16] = {
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0x01, 0x12, 0x23, 0x34, 0x45, 0x56, 0x67, 0x78,
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0x89, 0x9a, 0xab, 0xbc, 0xcd, 0xde, 0xef, 0xf0
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};
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uint8_t beaconUuid[16] = {0x01, 0x12, 0x23, 0x34, 0x45, 0x56, 0x67, 0x78,
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0x89, 0x9a, 0xab, 0xbc, 0xcd, 0xde, 0xef, 0xf0};
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// A valid Beacon packet consists of the following information:
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// UUID, Major, Minor, RSSI @ 1M
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BLEBeacon beacon(beaconUuid, 1, 2, -54);
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void startAdv(void)
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{
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void startAdv(void) {
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// Advertising packet
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// Set the beacon payload using the BLEBeacon class populated
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// earlier in this example
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@@ -54,8 +51,7 @@ void startAdv(void)
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namespace esphome {
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namespace ble {
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void Beacon::loop() {
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}
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void Beacon::loop() {}
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void Beacon::setup() {
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Bluefruit.begin();
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@@ -72,5 +68,5 @@ void Beacon::setup(){
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startAdv();
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}
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} // namespace dfu
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} // namespace ble
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} // namespace esphome
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@@ -7,5 +7,5 @@ class Beacon : public Component {
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void loop() override;
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void setup() override;
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};
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}
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}
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} // namespace ble
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} // namespace esphome
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@@ -416,9 +416,12 @@ void DebugComponent::dump_config() {
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#if defined(USE_NRF52) && defined(USE_ARDUINO)
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// TODO fixme
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ESP_LOGD(TAG, "bootloader version %lu.%lu.%lu", (bootloaderVersion >> 16) & 0xFF, (bootloaderVersion >> 8) & 0xFF, bootloaderVersion & 0xFF);
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ESP_LOGD(TAG, "MBR bootloader addr 0x%08lx, UICR bootloader addr 0x%08lx", (*((uint32_t *)MBR_BOOTLOADER_ADDR)), NRF_UICR->NRFFW[0]);
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ESP_LOGD(TAG, "MBR param page addr 0x%08lx, UICR param page addr 0x%08lx", (*((uint32_t *) MBR_PARAM_PAGE_ADDR)), NRF_UICR->NRFFW[1]);
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ESP_LOGD(TAG, "bootloader version %lu.%lu.%lu", (bootloaderVersion >> 16) & 0xFF, (bootloaderVersion >> 8) & 0xFF,
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bootloaderVersion & 0xFF);
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ESP_LOGD(TAG, "MBR bootloader addr 0x%08lx, UICR bootloader addr 0x%08lx", (*((uint32_t *) MBR_BOOTLOADER_ADDR)),
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NRF_UICR->NRFFW[0]);
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ESP_LOGD(TAG, "MBR param page addr 0x%08lx, UICR param page addr 0x%08lx", (*((uint32_t *) MBR_PARAM_PAGE_ADDR)),
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NRF_UICR->NRFFW[1]);
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reset_reason = nrf52_get_reset_reason_name();
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ESP_LOGD(TAG, "Reset Reason: %s", reset_reason.c_str());
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#endif
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@@ -14,8 +14,7 @@ static const char *const TAG = "deep_sleep.nrf52";
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void Nrf52DeepSleepBackend::begin_sleep(const optional<uint64_t> &sleep_duration) {
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// RTC works only during System On
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if (sleep_duration.has_value())
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{
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if (sleep_duration.has_value()) {
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// TinyUSBDevice.detach();
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// TODO deinit USB
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// TOOD and the rest of peripherals
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@@ -29,8 +28,7 @@ void Nrf52DeepSleepBackend::begin_sleep(const optional<uint64_t>& sleep_duration
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#ifdef SOFTDEVICE_PRESENT
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uint8_t sd_en = 0;
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(void) sd_softdevice_is_enabled(&sd_en);
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if (sd_en)
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{
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if (sd_en) {
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uint32_t ret_code = sd_power_system_off();
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assert((ret_code == NRF_SUCCESS) || (ret_code == NRF_ERROR_SOFTDEVICE_NOT_ENABLED));
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}
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@@ -11,6 +11,7 @@ class Nrf52DeepSleepBackend {
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public:
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void begin_sleep(const optional<uint64_t> &sleep_duration);
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void dump_config();
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protected:
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optional<uint32_t> last_sleep_duration_;
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};
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@@ -37,8 +37,7 @@ optional<uint32_t> DeepSleepComponent::get_run_duration_() const {
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return this->run_duration_;
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}
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void DeepSleepComponent::setup_deep_sleep_()
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{
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void DeepSleepComponent::setup_deep_sleep_() {
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this->next_enter_deep_sleep_ = false;
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const optional<uint32_t> run_duration = get_run_duration_();
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if (run_duration.has_value()) {
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@@ -19,5 +19,5 @@ class DeviceFirmwareUpdate : public Component {
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output::BinaryOutput *reset_output_;
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#endif
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};
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}
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}
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} // namespace dfu
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} // namespace esphome
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@@ -46,7 +46,8 @@ void Logger::write_header_(int level, const char *tag, int line) {
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this->printf_to_buffer_("%s[%s][%s:%03u]: ", color, letter, tag, line);
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#ifdef USE_ARDUINO
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} else {
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this->printf_to_buffer_("%s[%s][%s:%03u]%s[%s]%s: ", color, letter, tag, line, ESPHOME_LOG_BOLD(ESPHOME_LOG_COLOR_RED), pcTaskGetName(current_task), color);
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this->printf_to_buffer_("%s[%s][%s:%03u]%s[%s]%s: ", color, letter, tag, line,
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ESPHOME_LOG_BOLD(ESPHOME_LOG_COLOR_RED), pcTaskGetName(current_task), color);
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}
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#endif
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}
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@@ -15,7 +15,6 @@
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namespace esphome {
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namespace logger {
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static const char *const TAG = "logger";
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#ifdef USE_ZEPHYR
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@@ -10,8 +10,7 @@ uint32_t millis() { return ::millis(); }
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void delay(uint32_t ms) { ::delay(ms); }
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uint32_t micros() { return ::micros(); }
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struct nrf5x_wdt_obj
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{
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struct nrf5x_wdt_obj {
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nrfx_wdt_t wdt;
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nrfx_wdt_channel_id ch;
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};
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@@ -37,18 +36,12 @@ void arch_init() {
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} seed;
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nRFCrypto.Random.generate(seed.seed8, sizeof(seed.seed8));
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randomSeed(seed.seed32);
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}
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void arch_feed_wdt() {
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nrfx_wdt_feed(&nrf5x_wdt.wdt);
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}
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void arch_feed_wdt() { nrfx_wdt_feed(&nrf5x_wdt.wdt); }
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void arch_restart() {
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NVIC_SystemReset();
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}
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void arch_restart() { NVIC_SystemReset(); }
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void nrf52GetMacAddr(uint8_t *mac)
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{
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void nrf52GetMacAddr(uint8_t *mac) {
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const uint8_t *src = (const uint8_t *) NRF_FICR->DEVICEADDR;
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mac[5] = src[0];
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mac[4] = src[1];
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@@ -21,8 +21,7 @@ void arch_restart() {
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// TODO
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}
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void nrf52GetMacAddr(uint8_t *mac)
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{
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void nrf52GetMacAddr(uint8_t *mac) {
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const uint8_t *src = (const uint8_t *) NRF_FICR->DEVICEADDR;
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mac[5] = src[0];
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mac[4] = src[1];
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@@ -14,16 +14,13 @@ static const char *const TAG = "nrf52";
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static int IRAM_ATTR flags_to_mode(gpio::Flags flags, uint8_t pin) {
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// For nRF52 extra modes are available.
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// Standard drive is typically 2mA (min 1mA) '0' sink (low) or '1' source (high). High drive (VDD > 2.7V) is typically 10mA low, 9mA high (min 6mA)
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// OUTPUT_S0S1 Standard '0', standard '1' same as OUTPUT
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// OUTPUT_H0S1 High drive '0', standard '1'
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// OUTPUT_S0H1 Standard '0', high drive '1'
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// OUTPUT_H0H1 High drive '0', high 'drive '1''
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// OUTPUT_D0S1 Disconnect '0' standard '1' (normally used for wired-or connections)
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// OUTPUT_D0H1 Disconnect '0', high drive '1' (normally used for wired-or connections)
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// OUTPUT_S0D1 Standard '0'. disconnect '1' (normally used for wired-and connections)
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// OUTPUT_H0D1 High drive '0', disconnect '1' (normally used for wired-and connections)
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// NOTE P0.27 should be only low (standard) drive, low frequency
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// Standard drive is typically 2mA (min 1mA) '0' sink (low) or '1' source (high). High drive (VDD > 2.7V) is typically
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// 10mA low, 9mA high (min 6mA) OUTPUT_S0S1 Standard '0', standard '1' same as OUTPUT OUTPUT_H0S1 High drive '0',
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// standard '1' OUTPUT_S0H1 Standard '0', high drive '1' OUTPUT_H0H1 High drive '0', high 'drive '1'' OUTPUT_D0S1
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// Disconnect '0' standard '1' (normally used for wired-or connections) OUTPUT_D0H1 Disconnect '0', high drive '1'
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// (normally used for wired-or connections) OUTPUT_S0D1 Standard '0'. disconnect '1' (normally used for wired-and
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// connections) OUTPUT_H0D1 High drive '0', disconnect '1' (normally used for wired-and connections) NOTE P0.27 should
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// be only low (standard) drive, low frequency
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if (flags == gpio::FLAG_INPUT) { // NOLINT(bugprone-branch-clone)
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return INPUT;
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} else if (flags == gpio::FLAG_OUTPUT) {
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@@ -48,9 +45,7 @@ struct ISRPinArg {
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// TODO test
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void (*irq_cb)(void *);
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void *irq_arg;
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static void pin_irq(void){
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irq_cb(irq_arg);
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}
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static void pin_irq(void) { irq_cb(irq_arg); }
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ISRInternalGPIOPin NRF52GPIOPin::to_isr() const {
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auto *arg = new ISRPinArg{}; // NOLINT(cppcoreguidelines-owning-memory)
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@@ -82,9 +77,7 @@ void NRF52GPIOPin::attach_interrupt(void (*func)(void *), void *arg, gpio::Inter
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void NRF52GPIOPin::setup() { pin_mode(flags_); }
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void NRF52GPIOPin::pin_mode(gpio::Flags flags) {
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pinMode(pin_, flags_to_mode(flags, pin_));
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}
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void NRF52GPIOPin::pin_mode(gpio::Flags flags) { pinMode(pin_, flags_to_mode(flags, pin_)); }
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std::string NRF52GPIOPin::dump_summary() const {
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char buffer[32];
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@@ -92,15 +85,9 @@ std::string NRF52GPIOPin::dump_summary() const {
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return buffer;
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}
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bool NRF52GPIOPin::digital_read() {
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return bool(digitalRead(pin_)) != inverted_;
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}
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void NRF52GPIOPin::digital_write(bool value) {
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digitalWrite(pin_, value != inverted_ ? 1 : 0);
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}
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void NRF52GPIOPin::detach_interrupt() const {
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detachInterrupt(pin_);
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}
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bool NRF52GPIOPin::digital_read() { return bool(digitalRead(pin_)) != inverted_; }
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void NRF52GPIOPin::digital_write(bool value) { digitalWrite(pin_, value != inverted_ ? 1 : 0); }
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void NRF52GPIOPin::detach_interrupt() const { detachInterrupt(pin_); }
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} // namespace nrf52
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@@ -1,15 +1,9 @@
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#include "variant.h"
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const uint32_t g_ADigitalPinMap[] =
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{
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const uint32_t g_ADigitalPinMap[] = {
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// P0
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0 , 1 , 2 , 3 , 4 , 5 , 6 , 7 ,
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8 , 9 , 10, 11, 12, 13, 14, 15,
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16, 17, 18, 19, 20, 21, 22, 23,
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24, 25, 26, 27, 28, 29, 30, 31,
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0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30,
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31,
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// P1
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32, 33, 34, 35, 36, 37, 38, 39,
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40, 41, 42, 43, 44, 45, 46, 47
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};
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32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47};
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@@ -13,4 +13,3 @@
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#define LED_STATE_ON (1)
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#define PIN_SERIAL1_RX (33) // P1.01
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#define PIN_SERIAL1_TX (34) // P1.02
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