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	Group component tests to reduce CI time (#11134)
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						 Jesse Hills
						Jesse Hills
					
				
			
			
				
	
			
			
			
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			| @@ -1,14 +1,5 @@ | ||||
| uart: | ||||
|   - id: seeed_mr60fda2_uart | ||||
|     tx_pin: ${uart_tx_pin} | ||||
|     rx_pin: ${uart_rx_pin} | ||||
|     baud_rate: 115200 | ||||
|     parity: NONE | ||||
|     stop_bits: 1 | ||||
|  | ||||
| seeed_mr60fda2: | ||||
|   id: my_seeed_mr60fda2 | ||||
|   uart_id: seeed_mr60fda2_uart | ||||
|  | ||||
| binary_sensor: | ||||
|   - platform: seeed_mr60fda2 | ||||
|   | ||||
| @@ -1,5 +1,4 @@ | ||||
| substitutions: | ||||
|   uart_tx_pin: GPIO5 | ||||
|   uart_rx_pin: GPIO4 | ||||
| packages: | ||||
|   uart_115200: !include ../../test_build_components/common/uart_115200/esp32-c3-idf.yaml | ||||
|  | ||||
| <<: !include common.yaml | ||||
|   | ||||
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