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Group component tests to reduce CI time (#11134)
This commit is contained in:
committed by
Jesse Hills
parent
132e949927
commit
2864bf1674
@@ -5,12 +5,6 @@ esphome:
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id: inverter0_battery_recharge_voltage_out
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value: 48.0
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uart:
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- id: uart_pipsolar
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tx_pin: ${tx_pin}
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rx_pin: ${rx_pin}
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baud_rate: 115200
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pipsolar:
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id: inverter0
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@@ -1,5 +1,5 @@
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substitutions:
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tx_pin: GPIO4
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rx_pin: GPIO5
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packages:
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uart: !include ../../test_build_components/common/uart/esp32-c3-idf.yaml
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<<: !include common.yaml
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@@ -1,5 +1,8 @@
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substitutions:
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tx_pin: GPIO17
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rx_pin: GPIO16
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tx_pin: GPIO4
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rx_pin: GPIO5
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packages:
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uart: !include ../../test_build_components/common/uart/esp32-idf.yaml
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<<: !include common.yaml
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@@ -1,5 +1,4 @@
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substitutions:
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tx_pin: GPIO4
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rx_pin: GPIO5
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packages:
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uart: !include ../../test_build_components/common/uart/esp32-idf.yaml
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<<: !include common.yaml
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@@ -1,5 +1,8 @@
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substitutions:
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tx_pin: GPIO4
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rx_pin: GPIO5
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tx_pin: GPIO0
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rx_pin: GPIO2
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packages:
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uart: !include ../../test_build_components/common/uart/esp8266-ard.yaml
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<<: !include common.yaml
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@@ -2,4 +2,7 @@ substitutions:
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tx_pin: GPIO4
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rx_pin: GPIO5
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packages:
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uart: !include ../../test_build_components/common/uart/rp2040-ard.yaml
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<<: !include common.yaml
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